Parallel-Pipelined Radix-6 Multipath Delay Commutator FFT Architectures
نویسنده
چکیده
The new Proposed design has been designed and developed by novel parallel-pipelined Fast Fourier Transform (FFT) architecture. The most important and fastest efficient algorithm is a FFT. FFT is used to computes the Discrete Fourier Transform (DFT). FFT is mainly applied in autocorrelation, spectrum analysis, linear filtering and pattern recognition system. The proposed architectures were designed by using register minimization and folding transformation technique. The critical path is reduced by pipelining and the multiple inputs and multiple outputs are computed by parallel processing. Furthermore, radix-2, radix3, radix-6 decimation in time and decimation in frequency algorithm can be used. As a result, the radix-6 has been developed to reduce the complexity of hardware and the computational intension. The power dissipation can be decreased and unwanted operations are stopped by using the clock gates. Keywords— Fast Fourier Transform (FFT), radix 6, Pipelining, Parallel processing, Multipath Delay Commutator (MDC).
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